| Copyright | (c) Aleksandr Penskoi 2019 |
|---|---|
| License | BSD3 |
| Maintainer | aleksandr.penskoi@gmail.com |
| Stability | experimental |
| Safe Haskell | None |
| Language | Haskell2010 |
NITTA.Model.ProcessorUnits.Fram
Description
Documentation
Constructors
| Fram | |
Instances
A processor unit control ports (signals, flags).
Instances
| Show (Ports (BusNetwork tag v x t)) Source # | |
Defined in NITTA.Model.Networks.Bus | |
| Show (Ports (Accum v x t)) Source # | |
| Show (Ports (Broken v x t)) Source # | |
| Show (Ports (Comparator v x t)) Source # | |
Defined in NITTA.Model.ProcessorUnits.Comparator | |
| Show (Ports (Divider v x t)) Source # | |
| Show (Ports (Fram v x t)) Source # | |
| Show (Ports (SimpleIO i v x t)) Source # | |
| Show (Ports (LogicalUnit v x t)) Source # | |
Defined in NITTA.Model.ProcessorUnits.LogicalUnit | |
| Show (Ports (Multiplier v x t)) Source # | |
Defined in NITTA.Model.ProcessorUnits.Multiplier | |
| Show (Ports (Shift v x t)) Source # | |
| data Ports (Accum v x t) Source # | |
| data Ports (Broken v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Broken | |
| data Ports (Comparator v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Comparator | |
| data Ports (Divider v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Divider | |
| data Ports (Fram v x t) Source # | |
| data Ports (LogicalUnit v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.LogicalUnit | |
| data Ports (Multiplexer v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Multiplexer | |
| data Ports (Multiplier v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Multiplier | |
| data Ports (Shift v x t) Source # | |
| data Ports (BusNetwork tag v x t) Source # | |
Defined in NITTA.Model.Networks.Bus | |
| data Ports (SimpleIO i v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.IO.SimpleIO | |
data family IOPorts pu Source #
Instances
| Show (IOPorts (BusNetwork tag v x t)) Source # | |
Defined in NITTA.Model.Networks.Bus | |
| Show (IOPorts (Accum v x t)) Source # | |
| Show (IOPorts (Broken v x t)) Source # | |
| Show (IOPorts (Comparator v x t)) Source # | |
Defined in NITTA.Model.ProcessorUnits.Comparator | |
| Show (IOPorts (Divider v x t)) Source # | |
| Show (IOPorts (Fram v x t)) Source # | |
| Show (IOPorts (I2C v x t)) Source # | |
| Show (IOPorts (SPI v x t)) Source # | |
| Show (IOPorts (LogicalUnit v x t)) Source # | |
Defined in NITTA.Model.ProcessorUnits.LogicalUnit | |
| Show (IOPorts (Multiplexer v x t)) Source # | |
Defined in NITTA.Model.ProcessorUnits.Multiplexer | |
| Show (IOPorts (Multiplier v x t)) Source # | |
Defined in NITTA.Model.ProcessorUnits.Multiplier | |
| data IOPorts (Accum v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Accum | |
| data IOPorts (Broken v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Broken | |
| data IOPorts (Comparator v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Comparator | |
| data IOPorts (Divider v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Divider | |
| data IOPorts (Fram v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Fram | |
| data IOPorts (I2C v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.IO.I2C | |
| data IOPorts (SPI v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.IO.SPI | |
| data IOPorts (LogicalUnit v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.LogicalUnit | |
| data IOPorts (Multiplexer v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Multiplexer | |
| data IOPorts (Multiplier v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Multiplier | |
| data IOPorts (Shift v x t) Source # | |
Defined in NITTA.Model.ProcessorUnits.Shift | |
| data IOPorts (BusNetwork tag v x t) Source # | |
Defined in NITTA.Model.Networks.Bus | |